9600 baud serial transmission Serial transmission (at 9600 baud) When using a PIC with only 4 or 6 i/o pins, even using I2C comms is an 'extravagance'. However, a single pin can be allocated to 'serial transmit'. Further, if 'open collector' mode is used, the 'transmit' line can be shared by other units. Many low-end PIC's come with an internal 4MHz OSC which gives a CPU CLK of 1MHz = 1uS The serial 9600 baud has a 'bit time' of 1/9600 = 104.166r uS. If we use 104 CLK's per bit, the error, over 10 bits, will be less than 2%. Pseudo code The byte transmit routine is called with the 8 bit value to be sent in rTxd The TRIS setting is saved to rTris (the TRIS latch is write only) Bit0 of portA is used as the serial output pin (the value will be set to '0' as the TRIS latch is used as the 'data output' control) In RS232, the frame starts with the 'start bit' (0), then 8 data bits are sent (bit0 is transmitted first) and the frame ends with (at least) one 'stop' bit (1) .. Typically the receiver will 're-sync' on each start bit, so the time between bytes is irrelevant (so long as there is at least 1 stop bit) The transmit sub-routine should make no assumptions about what is happening elsewhere. This means it starts by setting bit0 TRIS Hi (tri-state) then sets PortA b0 Lo (in reediness for the start bit) TRIS Lo (start bit), Prepare Txd b0, wait '104' TRIS b0, Prepare Txd b1, wait '104' TRIS b1, Prepare Txd b1, wait '104' TRIS b2, Prepare Txd b1, wait '104' TRIS b3, Prepare Txd b1, wait '104' TRIS b4, Prepare Txd b1, wait '104' TRIS b5, Prepare Txd b1, wait '104' TRIS b6, Prepare Txd b1, wait '104' TRIS b7, wait '104' TRIS Hi (stop bit), wait '104' Return